Architecture of Computing Systems - ARCS 2011: 24th by Volker Hampel, Grigori Goronzy, Erik Maehle (auth.), Mladen

By Volker Hampel, Grigori Goronzy, Erik Maehle (auth.), Mladen Berekovic, William Fornaciari, Uwe Brinkschulte, Cristina Silvano (eds.)

This booklet constitutes the refereed court cases of the twenty fourth foreign convention on structure of Computing structures, ARCS 2011, held in Lake Como, Italy, in February 2011. The 22 revised complete papers offered in seven technical classes have been rigorously reviewed and chosen from sixty two submissions. The papers are geared up in topical sections on customization and alertness particular accelerators; multi/many-core architectures; adaptive approach architectures; processor architectures; reminiscence architectures optimization; natural and autonomic computing; network-on-chip architectures.

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Extra info for Architecture of Computing Systems - ARCS 2011: 24th International Conference, Como, Italy, February 24-25, 2011. Proceedings

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Reconfigurable Vector Register Windows for Fast Matrix Computation on the Orthogonal Multiprocessor. In: Proceedings of the International Conference on Application Specific Array Processors, pp. 202–213, 5-7 (1990) 15. : Register Pointer Architecture for Efficient Embedded Processors. In: DATE 2007: Proceedings of the Conference on Design, Automation and Test in Europe, San Jose, CA, USA, pp. 600–605. EDA Consortium (2007) 16. : The SARC Architecture. Micro 30(5), 16–29 (2010) 17. : Scalable Simulation of Decoupled Accelerator Architectures.

These approaches reaches high performance, but require a significant programming effort. Pattern matching has also been evaluated on highly threaded machines like the Cray XMT [5], obtaining stable performance on while using differently sized dictionaries. Commodity hardware such as GPUs have become an appealing solution for computeintensive applications, and the research has started to investigate them for pattern matching with respect to other solutions [16]. The first attempt, PixelSnort [9], employs Cg, a graphic-based Application Programming Interfaces (API), and only integrates the single-pattern algorithm KMP.

Introduction to the Cell Multiprocessor. IBM J. Res. Dev. 49(4/5), 589–604 (2005) 13. : The Burroughs Scientific Processor (BSP). IEEE Transactions on Computers C-31(5), 363–376 (1982) 14. : Reconfigurable Vector Register Windows for Fast Matrix Computation on the Orthogonal Multiprocessor. In: Proceedings of the International Conference on Application Specific Array Processors, pp. 202–213, 5-7 (1990) 15. : Register Pointer Architecture for Efficient Embedded Processors. In: DATE 2007: Proceedings of the Conference on Design, Automation and Test in Europe, San Jose, CA, USA, pp.

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